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http://dr.iiserpune.ac.in:8080/xmlui/handle/123456789/11323| Title: | Perspective on Ferroelectric and Nonferroelectric Low-Dimensional Metal Halide Perovskites for Memristor Technology |
| Authors: | Samanta, Ranita PANDAY, RISHUKUMAR Ludovisi, Giulia BOOMISHANKAR, RAMAMOORTHY Cortecchia, Daniele Dept. of Chemistry |
| Keywords: | Chemistry 2026-JUN-WEEK4 TOC-JUN-2026 2026 |
| Issue Date: | Jun-2026 |
| Publisher: | Wiley |
| Citation: | Small, 7(06). |
| Abstract: | Metal-oxide-based resistive switching (RS) memristors have been extensively investigated, but their practical application is often hindered by complex fabrication processes and high-power consumption. Metal halide perovskites have emerged as promising alternatives due to their low-cost fabrication, high defect tolerance, and large I–V hysteresis. Their intrinsic ion migration makes them suitable for resistive switching and artificial synaptic devices. In particular, low-dimensional hybrid-halide perovskites (LHPs) have attracted considerable attention because their electronic properties can be tuned by engineering the organic spacer cations. Compared with their three-dimensional counterparts, they offer improved stability and design flexibility. Moreover, ferroelectric LHPs provide intrinsic nonvolatility beneficial for neuromorphic computing applications. In this perspective, we examine the molecular engineering, synthetic strategies, and operating mechanisms of memristors based on LHPs and their applications in neuromorphic computing. We comparatively analyze the ferroelectric and nonferroelectric variants, highlighting the superior stability and nonvolatility of ferroelectric types versus the faster switching and simpler fabrication of nonferroelectric ones. We provide a systematic four-stage experimental protocol for unambiguously identifying ferroelectric RS (FeRS) in LHPs, benchmarking key performance parameters and variability challenges for device engineering. We finally conclude with a forward-looking outlook on materials design, multimodal stimulus response, multiterminal architectures, and hardware security applications. |
| URI: | https://doi.org/10.1002/sstr.70505 http://dr.iiserpune.ac.in:8080/xmlui/handle/123456789/11323 |
| ISSN: | 2688-4062 2688-4062 |
| Appears in Collections: | JOURNAL ARTICLES |
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