Abstract:
Superconducting Quantum Processors require high fidelity and fast two-qubit gates for performing complex computations like Controlled-Z (CZ) but in a physical system, control lines and environment introduce signal distortion and cause frequency drifts in the qubit, leading to errors in the gate operation which degrade the gate performance. This thesis presents the simulation of the Controlled-Z (CZ) gate at the pulse level by implementing various pulse envelopes, including Gaussian Flat top and spectrally optimized slepian sequences. We conducted two-dimensional parameter sweeps to optimize the Controlled-Z (CZ) gate and compared the trade-offs with experimental hardware performance. To mitigate hardware-induced signal distortions, we imple mented digital filters like IIR filter and in simulations we can clearly demonstrate how these distortions impact qubit dynamics.
